Characteristics of JFET

Characteristics of JEET

AU : May-12, 13, 14, 17, Dec.-O2, 08, 10

• To understand electrical behaviour of a JFET, it is necessary to study the interrelation of the current and voltages in JFET. These relationships can be plotted graphically which are commonly known as the characteristics of JFET. The important characteristics of JFET are drain characteristics and transfer characteristics. The following section explains these characteristics in detail.

1. Drain Characteristics

• Fig. 3.4.1 shows the drain characteristics of a n-channel JFET. The curves represent relationship between the drain current ID and drain to source voltage VDS for different values of V_GS. Fig. 3.4.2 shows the experimental setup required to plot this characteristics.

• Vcs and VDS both = 0 : When V_GS = 0 the channel is entirely open. But VDS = 0, so there is no attractive force for the majority carriers (electrons in n-channel JFET) and hence drain current does not flow.

• Self pinch-off at no bias (V_GS = 0) : At V_GS = 0, in response to a small applied voltage VDS, the n-type bar acts as a simple semiconductor resistor, and the current ID increases linearly with VDS. As VDS increases, the voltage drop along the channel also increases. This increase in voltage drop increases the reverse bias on gate-source junction and causes the depletion regions to penetrate into the channel, reducing channel width. The effect of reduction in channel width provides more opposition to increase in drain current ID. Thus, rate of increase in ID with respect to VDS is now reduced. This is shown by the curved shape in the characteristics.

• At some value of VDS, drain current ID cannot be increased further, due to reduction in channel width. Any further increase in VDS does not increase the drain current ID ID approaches the constant saturation value. The voltage VDS at which the current ID reaches to its constant saturation level is called 'Pinch-Off Voltage', Vp.

• V_GS with negative bias : When an external bias, of say -1 V, is applied between the gate and the source, the gate channel junctions are further reverse biased, reducing the effective width of the channel available for the conduction. Because of this, drain current will reduce and pinch off voltage is reached at a lower drain current than when VGS = 0, as shown in Fig. 3.4.1.

• By applying several values of negative external bias voltage (VGS), a family of curves are obtained as shown in Fig. 3.4.1. From Fig. 3.4.1 it can be observed that for more negative values of VGS, the pinch-off voltage is reached at lesser values of ID.

• Breakdown region : We can observe from the Fig. 3.4.1 that if we increase value of VDS beyond pinch-off voltage, Vp, the drain current ID remains constant, up to certain value of VDS. If we further exceed VDS, the voltage will be reached at which the  gate-channel junction breaks down, due to avalanche effect. At this point the drain current increases very rapidly, and the device may be destroyed.

• It can be observed that the values of VDS for breakdown are reduced as the negative gate bias is increased. This is because the total reverse breakdown voltage is the addition of the reverse voltage due to self pinch-off and the externally applied voltage V_GS

• Ohmic and saturation regions :

• It is seen that the drain characteristics of JFET is divided into two regions : Ohmic region and saturation region. In the ohmic region, the drain current ID varies with VDS and the JFET is said to behave as voltage variable resistance.

• In the saturation region, the drain current ID remains fairly constant and does not vary with V_GS

• Cut-off : As we know, for an n-channel JFET, the more negative VGS causes drain current to reduce and pinch-off voltage to reach at a lower drain current. When VGS is made sufficiently negative, ID is reduced to 0, as shown in the Fig. 3.4.1. This is caused by the widening of the depletion region to a point where it completely closes the channel. The value of VGS at the cut-off point is designated as V_GS (OFF)-

• Relation of VGS (off) and Vp : I_D is 0 when V_GS = Drain characteristics for p-channel FET

• In a p-channel JFET the source is positive with respect to the drain. Here the source is the source of holes which flow through the channel to the drain. The pinch-off is achieved by making the source to gate voltage, VgG negative (i.e. VGS positive) there by reverse biasing the p-n junction diode formed by the channel and the gate.

• The Fig. 3.4.3 shows the drain characteristics of p-channel JFET. Note the similarities between these characteristics and those shown for n-channel JFET in Fig. 3.4.1.

• The curves are identical except that voltage VGS and VDS have reversed polarities and current ID flows in reverse direction.

2. Transfer Characteristics

• The relationship between the drain current ID and gate to source voltage VGS is non-linear as shown in the Fig. 3.4.4. This relationship is defined by Shockey’s equation

• The squared term of the equation will result in a non-linear relationship between ID and V_GS producing a curve that grows exponentially with decreasing magnitudes of V_GS. From equation we can also write,

• In the equation values of IDSS and Vp are constants, value of VGS controls ID.

• A point A at the bottom end of the curve on the V_GS-axis represents V_GS(off), and point B at the top end of the curve on the ID axis represents IDSS (maximum drain current at V_GS = 0). Thus, this curve shows the operating limits of a JFET. These are :

• I_D = 0 when V_GS = V_GS(off)

• I_D = I_DSS when V_GS = 0

Transfer characteristics for p-channel JFET

• The Fig. 3.4.5 shows the transfer characteristics of p-channel JFET. It is identical to transfer characteristics of n-channel JFET except that the polarities of V_GS and I_D are reversed.

Review Questions

1. With relevant diagrams and characteristic curves, explain the operation of JFET.

2. Draw the drain and transfer characteristics of a n-channel JFET and explain.

3. Explain the construction of N channel JFET. Also explain the drain and transfer characteristics of the same.

AU : Dec.-10, Marks 16

4. Explain three distinct regions of the output characteristics.

5. Define the pinch-off voltage of JFET.

AU : May-13, Marks 2

6. Draw the drain characteristics of FET and indicate important operating regions.

AU : May-14, Marks 2

7. Sketch and explain the typical shape of drain characteristics of JFET for ^GS = 0 with indication of four region clearly.