Data Transfer Schemes

Data Transfer Schemes

In I/O data transfer, the system requires the transfer of data between external circuitry and the microprocessor. In this section, we will discuss different ways of I/O transfer.

a. Program controlled I/O or polling control.

b. Interrupt program controlled I/O or interrupt driven I/O.

c. Hardware controlled I/O.

d. I/O controlled by handshake signals.

e. I/O controlled by ready signal.

a. Program controlled I/O or polling control : In program controlled I/O, the transfer of data is completely under the control of the microprocessor program. This means that the data transfer takes place only when an I/O transfer instructions executed. In most of the cases it is necessary to check whether the device is ready for data transfer or not. To check this, microprocessor polls the status bit associated with the I/O device.

b. Interrupt program controlled I/O or Interrupt driven I/O : In interrupt program controlled approach, when a peripheral is ready to transfer data, it sends an interrupt signal to the microprocessor. This indicates that the I/O data transfer is initiated by the external I/O device. When interrupted, the microprocessor stops the execution of the program and transfers the program control to an interrupt service routine. This interrupt service routine performs the data transfer. After the data transfer, it returns control to the main program at the point it was interrupted.

c. Hardware controlled I/O : To increase the speed of data transfer between memory and I/O, the hardware controlled I/O is used. It is commonly referred to as direct memory access (DMA). The hardware which controls this data transfer is commonly known as DMA controller. The DMA controller sends a HOLD signal to the microprocessor to initiate data transfer. In response to HOLD signal, microprocessor releases its data, address and control buses to the DMA controller. Then the data transfer is controlled at high speed by the DMA controller without the intervention of the microprocessor. After data transfer, DMA controller sends low on the HOLD pin, which gives the control of data, address and control buses back to the microprocessor. This type of data transfer is used for large data transfers.

d. I/O control by handshake signals : The handshake signals are used to ensure the readiness of the I/O device and to synchronize the timing of the data transfer. In this data transfer, the status of handshaking signals are checked between the microprocessor and an 1/O device and when both are ready, the actual data is transferred.

e. I/O control by READY signal : This technique is used to transfer data between slower I/O device and the microprocessor. In some applications, speed of I/O system is not compatible with the microprocessor's timings. This means that it takes longer time to read/write data. In such situations, the microprocessor has to confirm whether a peripheral is ready to transfer data or not. If READY pin is high, the peripheral is ready otherwise 8085 enters WAIT state or WAIT states. These WAIT states elongate the read/write cycle timings and prepare 8085 microprocessor to communicate with slower I/O devices.

Review Question

1. With necessary diagrams, explain the different data transfer schemes in 8085.