I/O Port Structure with Programming

I/O Port Structure with Programming

• In the PIC18 family, the number of I/O ports supported by a particular microcontroller varies depending on the family member and the number of I/O pins the device has.

• Table 18.13.1 shows Ports in PIC18 family members.

• The PIC18F458 has five I/O ports:

■ Port A (7 Bit): RAO - RA6

■ Port B (8 Bit): RBO - RB7

■ Port C (8-Bit): RC0 - RC7

■ Port D (8 Bit): RD0 - RD7

■ Port E (3 Bit): REO - RE2

• Some pins of the I/O ports are multiplexed with an alternate function from the peripheral features on the device. In general, when a peripheral is enabled, that pin may not be used as a general purpose I/O pin.

• Each port has three Special function registers (SFRs) associated with it:

■ TRIS register (Data Direction register)

■ PORT register (reads the levels on the pins of the device)

■ LAT register (output latch)

• The data latch (LAT register) is useful for read-modify write operations on the value that the I/O pins are driving.

• Each of the Ports A-E in the PIC18F458 can be used for input or output. These ports are bi-directional. The data direction register is TRISx (x stands for A - E) is used to set the direction either input or output.

• It is important to note that Data direction needs to be set before the I/O operation.

• Setting a TRISX bit (= 1) will make the corresponding PORTx pin an input (i.e., put the corresponding output driver in a high-impedance mode).

• Clearing a TRISX bit (= 0) will make the corresponding PORTX pin an output (i.e., put the contents of the output latch on the selected pin).

• Reading the PORTX register reads the status of the pins, whereas writing to it will write to the port latch.

• The Data Latch register (LATX) is also memory mapped. Read-modify-write operations on the LATX register, read and write the latched output value for PORTX.

 

Example 18.13.1 Write an instruction sequence to output the hex value 0x35 to port B.

Solution: The Port B should be configured for output before data is written to it.

CLRF       TRISB    ; Configure Port B for output

MOVLW    0X35     ; WREG 35h

MOVWF    PORTB   ; Send 35h to Port B

 

Example 18.13.2 Write an instruction sequence to read the current value of port D into WREG.

Solution:

SETF TRISD  ; Configure port D for input

MOVF PORTD, W ; Read data form port D and put it into WREG

 

Example 18.13.3 Configure the upper four pins of Port B for input and the lower four pins for output.

Solution :

MOVLW 0XF0  ; WREG = F0h

MOVWF TRISB ; Configure Port B upper as input and Port B lower as output

 

Example 18.13.4 Write a code to toggle all 8-bits of Port C forever with some time delay between ON and OFF states.

Solution :

CLRF   TRISC  ; Configure Port C for output

BACK:  MOVLW 0X55 ; WREG = 55h

MOVWF   PORTC   ; Send 55h to Port C

CALL     DELAY   ; Wait for some time

MOVLW   0XAA ; WREG = AAh

MOVWF   PORTC.  ; Send AAh to Port C

CALL   DELAY   ; Wait for some time

GOTO   BACK   ; Do forever

 

Example 18.13.5 Write a code to toggle all 8-bits of Port B forever with some time delay between ON and OFF states using read-modify-write.

Solution:

CLRF    TRISB    ; Configure Port B for output

MOVLW 0X55   ; WREG = 55h

MOVWF   PORTB  ; Send 55h to Port B

BACK:  COMF   PORTB, F  ; Complement bits of Port B

CALL      DELAY  ; Wait for some time

GOTO      BACK   ; Do forever

Note Upon reset, TRIS registers of all ports are loaded with value FFH, i.e. 11111111₂. As a result all ports act as input ports upon reset.

 

1. Port A

• PORTA is a 7-bit wide (RAO-RA6), bidirectional port. The corresponding Data Direction register is TRISA and Latch register is LATA.

Table 18.13.2 shows Port A alternate functions.

• The pins RA0, RA1, RA2, RA3, RA5 are multiplexed with analog inputs.

• The pins RA0, RA2 and RA3 are also multiplexed with the analog CVREF, VREF+ and VREF- inputs, respectively.

• The RA4 pin is multiplexed with the Timero module clock input to become the RA4/TOCKI pin. The RA4/TOCKI pin is a Schmitt Trigger input and an open-drain output.

• The RA5 pin is also multiplexed slave select input (SS) and low-voltage detect input (LVDIN)

• The RA6 pin is only enabled as a general I/O pin in ECIO and RCIO Oscillator modes.

• The operation of each pin is selected by clearing/setting the control bits in the ADCON1 register (A/D Control Register 1).

• All other RA port pins have TTL input levels and full CMOS output drivers.

• On a Power-on Reset, RA5 and RA3: RAO are configured as analog inputs and read as '0'. RA6 and RA4 are configured as digital inputs.

 

2. Port B

• PORTB is a 8-bit wide (RBO0-RB7), bidirectional port. The corresponding Data Direction register is TRISB and Latch register is LATB.

• Read-modify-write operations on the LATB register, read and write the output value for PORTB.

Initializing Port B

CLRF  PORTB ; Initialize PORTB by clearing output data latches

CLRF  LATB ; Alternate method to clear output data latches

 

Example 18.13.6 Write an instruction sequence to set RB3:RB0 as outputs, RB5:RB4 as inputs and RB7:RB6 as outputs.

Solution :

MOVLW 30h  ; Value (00110000 in binary) used to initialize data direction

MOVWF TRISC ; Set RB3:RB0 as outputs, RB5:RB4 as inputs and RB7:RB6 as outputs.

• Each of the PORTB pins has a weak internal pull-up. A single control bit can turn on all the pull-ups. This is performed by clearing bit  (INTCON2 register). The weak pull-up is automatically turned off when the port pin is configured as an output. The pull-ups are disabled on a Power-on Reset.

• Table 18.13.3 shows Port B alternate functions.

• The pins RB0, RB1 and RB2 are multiplexed with the external interrupt pins INTO, INT1 and INT2, respectively.

• The pin RB2 is also multiplexed with Transmit signal for CAN bus.

• The pin RB3 is multiplexed with Receive signal for CAN bus.

• Four of the PORTB pins (RB7: RB4) have an interrupt on-change feature. This "interrupt on change" is triggered when any of the RB7: RB4 pins, configured as an input, changes level.

• The input pins (of RB7: RB4) are compared with the old value latched on the last read of PORTB. The "mismatch" outputs of RB7 : RB4 are ORed together to generate the RB Port Change Interrupt with Flag bit RBIF (INTCON register). This interrupt can wake the device from Sleep.

 

3. Port C

• PORTC is an 8-bit wide, bidirectional port.

• The corresponding Data Direction register is TRISC and Latch register is LATC.

• Read-modify-write operations on the LATC register, read and write the latched output value for PORTC.

• Table 18.13.4 shows Port C alternate functions.

• PORTC uses Schmitt Trigger input buffers

Initializing Port C

CLRF   PORTC   ; Initialize PORTC by clearing output data latches

CLRF   LATC     ; Alternate method to clear output data latches

 

Example 18.13.7 Write an instruction sequence to set RC3: RCO as inputs RC5: RC4 as outputs RC7: RC6 as inputs.

Solution:

MOVLW 0CFh  ; Value (11001111 in binary) used to initialize data direction

MOVWF TRISC ; Set RC3:RCO as inputs, RC5:RC4 as outputs and RC7:RC6 as inputs

 

4. Port D

• PORTD is an 8-bit wide, bidirectional port. The corresponding Data Direction register is TRISD and Latch register is LATD.

• Read-modify-write operations on the LATD register, read and write the latched output value for PORTD.

• Table 18.13.5 shows Port D alternate functions.

PORTD uses Schmitt Trigger input buffers.

Initializing Port D

CLRF PORTD  ; Initialize PORTD by clearing output data latches

CLRF LATD    ; Alternate method to clear output data latches

MOVLW 07h   ; Comparator off

MOVWF CMCON  ; Comparator Control Register bits (CM2:CM0) 111 to make them off.

 

Example 18.13.8 Write an instruction sequence to set RD3: RD0 as inputs and RD7 : RD4 as outputs.

Solution:

MOVLW 0Fh   ; Value (00001111 in binary) used to initialize data direction

MOVWF TRISD  ; Set RD3: RDO as inputs and RD7: RD4 as outputs.

 

5. Port E

• PORTD is an 3-bit wide, bidirectional port. The corresponding Data Direction register is TRISE and Latch register is LATE.

• Read-modify-write operations on the LATE register, read and write the latched output value for PORTE.

• Table 18.13.6 shows Port E alternate functions.

• PORTE uses Schmitt Trigger input buffers.

Initialize PORT D

CLRF PORTE ; Initialize PORTE by clearing output data latches

CLRF LATE ; Alternate method to clear output data latches

 

Example 18.13.9 Write an instruction sequence to set RE1: REO as inputs and RE2 as output.

Solution :

MOVLW 03h ; Value (00000011 in binary) used to initialize data direction

MOVWF TRISE ; Set RE1 : RE0 as inputs and RE2 as output.

• The TRISE register also controls the operation of the Parallel Slave Port through the control bits in the upper half of the register, as shown in the Fig. 18.13.2.

bit 7  IBF : Input Buffer Full status bit

1 = A word has been received and waiting to be read by the CPU

0 = No word has been received

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TRISEO

bit 0

bit 6 OBF : Input Buffer Full status bit

1 = The output buffer still holds a previously written word

0 = The output buffer has been read

bit 5 IBOV : Input Buffer Overflow Detect bit (in Microprocessor mode)

1 = A write occurred when a previously input word has not been read

(must be cleared in software)

0 = No overflow occurred

bit 4 PSPMODE : Parallel Slave Port Mode Select bit

1 = Parallel Slave Port mode

0 = General Purpose I/O mode

bit 3 Uniplemented : Read as '0'

bit 2  TRISE2 : RE2 Direction Control bit

1 = Input

0 = Output

bit 1 TRISE1: RE1 Direction Control bit

1 = Input

0 = Output

bit 0 TRISE0 : RE0 Direction Control bit

1 = Input

0 = Output

Fig. 18.13.2 Bit pattern of TRISE register

• When the Parallel Slave Port is active, the PORTE pins function as its control inputs.

 

6. I/O Bit Manipulation Programming

• Many times it is necessary to access only 1 or 2 bits of the port instead of all 8-bits.

• The PIC18 I/O ports allow to access individual bits of the ports without altering the rest of the bits in that port.

• Table 18.13.7 gives the single bit instructions for the PIC18.

• Bit operations allow us to move, set and clear single bits in registers or numbers that we specify.

BCF

• This instruction will clear a bit that we specify in a given File register. The syntax is:

BCF <register>, <bit_num>

• Example :

BCF  TRISC, 0 ; Clear bit 0 of TRISC register

BSF

• This instruction will set a bit that we specify in a given File register. The syntax is : BSF <register>, <bit_num>

• Example:

BSF  PORTA, 4 ; Set bit 4 of Port A

BTFSC

• This instruction will test the bit that we specify in a given File register. If the bit is a 0, the instruction will tell the PIC to skip the next instruction. The syntax is : <register>, <bit_num>

• Example 1 :

BTFSC PORTB, 2; Check bit 2 of Port B, if it is zero code skips next instruction

• Example 2:

LOOP : BTFSC PORTA, 3 ; Monitor PA3 ; repeats instructions in the LOOP until PA3 is 0.

BRA LOOP

BTFSS

• This instruction will test the bit that we specify in a given File register. If the bit is a 1, the instruction will tell the PIC to skip the next instruction. The syntax is : BTFSS <register>, <bit_num>

• Example 1 :

BTFSS PORTC, 5; Check bit 5 of Port C, if it is 1 code skips next instruction

• Example 2:

LOOP : BTFSS PORTB, 3 ; Monitor PB3; repeat instructions in the LOOP until PB3 is 1.

BRA LOOP

BTG

• This instruction will toggles a bit that we specify in a given File register. The syntax is:

BTG <register>, <bit_num>

• Example: Code segment to generate square wave on pin PC2

BCF   TRISC, 2 ; Clear bit 2 of TRISC register to make RC2 an output pin

BACK: BTG  PORTC, 2 ; Toggle PC2

CALL  DELAY  ; Wait for some time

BRA  BACK  ; Repeat forever

 

7. Programming Examples

Example 18.13.10 Write the following programs. Create a square wave of 50% duty cycle on bit 0 of PORTA.

Solution: The 50% duty cycle means that T_ON = T_OFF. Therefore, we toggle RA0 with a time delay in between each state.

Program 1 : Using BCF and BSF instructions

BCF  TRISA, 0  ; Clear bit 0 of TRISA register to make RA0 an output pin

AGAIN : BSF PORTA, 0 ; Set bit 0 of Port A

CALL  DELAY  ; Wait for Some time

BCF  PORTA, 0 ; Clear bit 0 of Port A

CALL   DELAY ; Wait for Some time

BRA  AGAIN  ; Repeat forever

Program 2 : Using BTG instruction

BCF   TRISA, 0 ; Clear bit 0 of TRISA register to make RAO an output pin

AGAIN: BTG  PORTA, 0 ; Toggle bit 0 of Port A

CALL   DELAY  ; Wait for Some time

BRA  AGAIN  ; Repeat forever

 

Example 18.13.11 Write the following programs. Create a square wave of 66% duty cycle on bit 2 of PORTC.

Solution: The 66% duty cycle means that 2T_ON = T_OFF

BCF   TRISC, 2 ; Clear bit 2 of TRISC register to make RC2 an output pin

AGAIN : BSF  PORTC, 2  ; Set bit 2 of Port C

CALL   DELAY  ; Wait for some time twice for 66%

CALL   DELAY

BCF   PORTC, 2  ; Clear bit 2 of Port C

CALL   DELAY  ; Wait for Some time

BRA  AGAIN  ; Repeat forever

 

Example 18.13.12 Write a program to perform the following :

(a) Keep monitoring the RC3 bit until it becomes high

(b) When RC3 becomes high, write value-34H to Port B

(c) Send a high-to-low (H-to-L) 'pulse to RD2

Solution :

BSF  TRISC, 3  ; Set bit 3 of TRISC register to make RC3 an input pin

CLRF  TRISB    ; Make Port B an output port

BCF  TRISD, 2  ; Clear bit 2 of TRISD register to make RD2 an output pin ;

MOVLW 0x34  ; WREG = 34H

AGAIN: BTFSS  PORTC, 3 ; Test RC3, if RC3 = 1, skip next instruction

BRA    AGAIN   ; Repeat if RC3 = 0

MOVWF   PORTB  ; Send contents of WREG (34H) to Port B

BSF   PORTD, 2   ; Set bit 2 of Port D

BCF   PORTD,     ; Clear bit 2 of Port D

 

Example 18.13.13 Assume that bit RC3 is an input and represents the condition of an oven. If it goes low, it means that the food is ready. Monitor the bit RC3 continuously. Whenever it goes low, send a high-to-low pulse to port PB5 turn on a buzzer.

Solution :

BSF   TRISC, 3  ; Set bit 3 of TRISC register to make RC3 an input pin

BCF   TRISB, 5  ; Clear bit 5 of TRISB register to make RB5 an output pin

AGAIN: BTFSC  PORTC, 3 ; Test RC3, if RC3 = 0, skip next instruction

BRA   AGAIN  ; Repeat if RC3 = 1

BSF   PORTB, 2  ; Set bit 2 of Port B

BCF   PORTB, 2  ; Clear bit 2 of Port B

BRA  AGAIN  ; Repeat forever

 

Example 18.13.14 Assume that switch (SW) is connected to pin RB1. Write a program to check the status of SW and perform the following :

(a) If SW-0, send character 'N' to PORTC

(b) If SW=1, send character 'Y' to PORTC

Solution :

BSF TRISB, 1 ; Set bit 1 of TRISB register to make RB1 an input pin

CLRF   TRISC ; Make Port C an output port

AGAIN: BTFSC  PORTB, 1 ; Test RB1, if RB1 = 0, skip next instruction

BRA    NEXT ; if RB1 = 1, go to NEXT

MOVLW A 'N' ; Load ASCII of character N in WREG

MOVWF  PORTC ; Send it to Port C

BRA AGAIN  ; Repeat forever

NEXT : MOVLW A 'Y'  ; Load ASCII of character Y in WREG

MOVWF    PORTC  ; Send it to Port C

BRA  AGAIN  ; Repeat forever

 

Example 18.13.15 Assume that a switch (SW) is connected to pin RA3 and an LED to pin RB6. Write a program to get the status of the SW and send it to the LED.

Solution:

BSF   TRISA, 3 ; Set bit 3 of TRISA register to make RA3 an input pin

BCF   TRISB, 6  ; Clear bit 6 of TRISB register to make RB6 an output pin

AGAIN: BTFSS  PORTA, 3  ; Test RA3, if RA3 = 1, skip next instruction

BRA  NEXT  ; if RA3 = 0, go to NEXT

BSF   PORTB, 6  ; Set RB6 to make LED ON

BRA   AGAIN  ; Repeat forever

NEXT:  BCF   PORTB, 6  ; Clear RB6 to make LED OFF

BRA AGAIN ; Repeat forever

 

8. Input Pin Vs. LATx Port

• Writing to PORTX or LATx has the same effect, but reading PORTX register read the corresponding input pin. Reading LATx, reads the status of the corresponding internal port latch and not the status of the pin.

• Some instructions read the contents of an internal port latch instead of reading the status of an extern pin.

• When such instructions are executed following sequence of actions take place –

1. The instruction read the internal latch of the LATX and brings that data into the CPU.

2. The data is processed as per instruction.

3. The result of the operation is rewritten back to the LATx latch.

4. The data on the pins are changed only if the port bits are configured as an output pins i.e. TRISx bits are cleared to 0.

• For example, COMF PORTC instruction will read PORTC, complement all the data bits, then write the result back to PORTC.

Review Questions

1. Explain all ports (A-E) of PIC18FXXX.

2. Explain functions of Ports in PIC18FXXX.

3. Explain the alternate functions of Port A in PIC18FXXX.

4. Explain the alternate functions of Port B and Port C in PIC18FXXX.

5. Explain the alternate functions of Port D and Port E in PIC18FXXX.

6. Explain the bit pattern of TRISE register.

7. What is bit addressability? State its advantage.

8. Explain any four bit addressable instructions of PIC18F.

9. Explain input pin Vs. LATx Port of PIC18F.