Instruction Set Summary

Instruction Set Summary

• The instruction set is highly orthogonal and is grouped into four basic categories:

■ Byte-oriented operations

■ Bit-oriented operations

■ Literal operations

■ Control operations

• The PIC18 instruction set summary in Table 18.9.2 lists byte-oriented, bit-oriented, literal and control operations. Table 18.9.1 shows the opcode field descriptions.

• Most byte-oriented instructions have three operands :

1. The file register (specified by 'f')

2. The destination of the result (specified by 'd')

3. The accessed memory (specified by 'a')

• The file register designator 'f' specifies which file register is to be used by the instruction.

• The destination designator 'd' specifies where the result of the operation is to be placed. If 'd' is zero, the result is placed in the WREG register. If 'd' is one, the result is placed in the file register specified in the instruction.

• All bit-oriented instructions have three operands:

1. The file register (specified by 'f')

2. The bit in the file register (specified by 'b')

3. The accessed memory (specified by 'a')

• The bit field designator 'b' selects the number of the bit affected by the operation, while the file register designator 'f' represents the number of the file in which the bit is located.

• The literal instructions may use some of the following operands:

■ A literal value to be loaded into a file register (specified by 'k')

■ The desired FSR register to load the literal value into (specified by 'f')

■ No operand required (specified by '-')

• The control instructions may use some of the following operands:

■ A program memory address (specified by 'n')

■ The mode of the CALL or RETURN instructions (specified by 's')

■ The mode of the table read and table write instructions (specified by 'm')

■ No operand required (specified by '-')

• All instructions are a single word, except for three double-word instructions.

• All single-word instructions are executed in a single instruction cycle, unless a conditional test is true or the program counter is changed as a result of the instruction. In these cases, the execution takes two instruction cycles, with the additional instruction cycle(s) executed as a NOP.

• The double-word instructions execute in two instruction cycles.

• One instruction cycle consists of four oscillator periods. Thus, for an oscillator frequency of 4 MHZ, the normal instruction execution time is 1 µs.

• If a conditional test is true, or the program counter is changed as a result of an instruction, the instruction execution time is 2 µs. Two-word branch instructions (if true) would take 3 us.

1. PIC18FXX8

Table 18.9.1 Opcode Field Descriptions