Microprocessors and Microcontrollers: Unit III: (c) 8051 I/O Ports, Timer, Serial Port & Interrupts

Programming Interrupts

8051 I/O Ports, Timer, Serial Port & Interrupts

1. Programming Timer Interrupts 2. Programming External Hardware Interrupts 3. Programming the Serial Communication Interrupts

Programming Interrupts


1. Programming Timer Interrupts

The Timer 0 and Timer 1 interrupts are generated by TFO and TF1, which are set by a rollover in their respective Timer/Counter registers (except see Timer 0 in Mode 3). When a timer interrupt is generated, the flag that generated it is cleared by the on-chip hardware when the service routine is vectored.

We have seen the use of timer 0 and timer 1 with the polling method. Here, we are discussing the use of interrupts to program 8051 timers. We know that the timer flag (TF) is set (=1) when the timer rolls over. In polling method, the TF is monitored with the instruction 'JNB TF, target address'. We have to wait until the TF is raised. The problem with this polling method is that 8051 can not do anything else until TF is set to high. This problem can be solved using interrupt method. If the timer interrupt in the IE register is enabled, TF is set whenever the timer is rolled over and the 8051 is interrupted. Thus the 8051 can perform anything else until it is interrupted. After interruption (timer rolling over) only the 8051 remains busy in executing interrupt service routine.

 

Example 16.8.1 Write an 8051 ALP that continuously read 8-bit data from port 2 and sends it to port 0. At the same time it should generate square wave of 500 ,us period on port 1.0. Assume the crystal frequency = 11.0592 MHz.

Solution : We will use timer 0 in autoreload mode, i.e. mode 2. To generate square wave of 500 µs we have to toggle port 1.0 pin after every 250 µs.

Timer clock frequency = 11.0592 × 106 / 12 = 921.6 kHz

TH0 = 256 - 250 µs × 921.6 × 103 ≈ 26 = 1 AH

Program :

0RG 0000H

LJMP MAIN ; Avoid using memory space allocated to interrupt vector table

ORG 000BH ; ISR for Timer 0 interrupt

CPL P1.0 ; Complement P1.0 bit

RETI ; return from ISR

ORG 0030H         ; Start main program after interrupt vector table

MAIN : MOV TMOD, #02H ; Initialize timer 0 in mode 2

MOV P2, #0FFH ; Configure port 2 as input

MOV TH0 #AH ; Load timer count

MOV IE, #82H ; Enable timer 0 interrupt

SETB TR0 ; Start timer 0

BACK : MOV A, P2 ; Read data from P2

MOV P0, A          ; Send it on P0

SJMP BACK ; Repeat

END 

 

Example 16.8.2 Write a C program using interrupts to do the following :

a) Generate a 10000 Hz frequency on P0.1 using timer 0 8-bit auto-reload,

b) Use timer 1 as an event counter to count up a 1 Hz pulse and display it on P2. The pulse is connected to EX1.

Assume that XTAL  = 12 MHz. Set the baud rate at 9600.

Solution :

#include <reg51.h>

sbit SWAVE = P0^1;

unsigned char cnt;

void timero () interrupt 1

{

SWAVE = - SWAVE; /* toggle pin P0.1 */

}

void timer1 () interrupt 3

{

cnt++; /* increment counter */

P2 = cnt; /* display count value on port P2 */

}

void main(void)

{

cnt = 0; /* set counter to zero */

TMOD = 0x42;

TH0= 0x-50; /* Load count to generate 10000 Hz */

IE = 0x86; /* enable interrupts */

TR0 = 1; /* start timer0 */

TR1 = 1; /* start timer1 */

while(1); /* wait until interrupted */

}

Counter count calculations :

T = 12/12 MHz = 1 µs

1/10 kHz = 100 µs. Half cycle period = 100 µs/2 = 50 µs

50 µs / 1 µs = 50

 

2. Programming External Hardware Interrupts

Pins, P 3.2 (pin number 12) and P 3.3 (pin number 13) in port 3 are used as external hardware interrupts INTO and INTI, respectively. The external Interrupts   can each be either level-activated or transition-activated, depending on bits ITO and IT1 in register TCON.

In the level triggered mode, external interrupt pins  are normally high and if a low-level signal is applied to them, if triggers the interrupt. On the other hand, in edge trigger mode, high to low input signal transition its the interrupt.

The flags that actually generate these interrupts are bits IE0 and IE1 in TCON. When an external interrupt is generated, the flag that generated it is cleared by the hardware when the service routine is vectored to only if the interrupt was transition-activated. If the interrupt was level-activated, then the external requesting source is what controls the request flag, rather than the on-chip hardware.

If ITx = 0, external interrupt x is triggered by a detected low at the  pin. If ITx = 1, external interrupt x is edge-triggered. In this mode if successive samples of the  pin show a high in one cycle and a low in the next cycle, interrupt request flag IEx in TCON is set. Flag bit lEx then requests the interrupt.

Since the external interrupt pins are sampled once each machine cycle, an input high or low should hold for at least 12 oscillator periods to ensure sampling. If the external interrupt is transition-activated, the external source has to hold the request pin high for at least one machine cycle, and then hold it low for at least one machine cycle to ensure that the transition is seen so that interrupt request flag lEx will be set. lEx will be automatically cleared by the CPU when the service routine is called.

If the external interrupt is level-activated, the external source has to hold the request active until the requested interrupt is actually generated. Then it has to deactivate the request before the interrupt service routine is completed, or else another interrupt will be generated.

 

Example 16.8.3 Write an 8051 ALP to glow LED for a fraction of second when external interrupt INT0 is activated.

Solution :

ORG 0000H

LJMP MAIN ; Avoid using memory space allocated to interrupt vector table

ORG 0003H

SETB P1.0 ; Turn ON LED

BACK : MOVE R2, #0FFH ; Load count

DJNZ BACK ; Decrement count and if not zero repeat

CLR P1.0 ; Turn OFF LED

RETI ; Return to main program

ORG 0030H         ; Load count ; Start main program after interrupt vector table

MAIN : MOV IE, #10000001B        ; Enable external interrupt 0

HERE : SJMP HERE ; wait for interrupt

END

 

3. Programming the Serial Communication Interrupts

The Serial port interrupt is generated by the logical OR of RI and TI. Neither of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine will normally have to determine whether it was RI or TI that generated the interrupt, and the bit will have to be cleared in software.

Here, we are discussing interrupt based serial communication. In this case, the 8051 can perform other tasks in addition to serial communication, i.e. sending and receiving data from serial communication port.

The transmit interrupt (TI) flag is set (=1) when the last bit of the framed data (stop bit) is transmitted. This indicates that the SBUF register is ready to transmit the next byte. The receive interrupt (RI) flag is set (=1) when the complete frame of data (with stop bit) is received. RI indicates that the received byte needs to be picked up before it is lost by new incoming serial data.

All the above concepts are applied equally using polling or an interrupt. Only difference is in serving the serial communication needs. In polling method, the flag (TI or RI) is monitored. The 8051 can not do anything else until this flag is set to high. This problem is solved using interrupt method. When 8051 has received a byte or is ready to send the next byte, the RI or TI flag respectively is set. Any other work can be performed while the serial communication needs are served. There is a single interrupt set aside for serial communication. If IE register (IE.4) is enabled, when RI or TI is set (= 1), the 8051 is interrupted. When interrupted, the ISR written at 0023h is executed by 8051. In ISR, the TI and RI flags must be examined to check which one caused the interrupt and according to flag the response is given.

 

Example 16.8.4 Write an 8051 ALP that continuously read 8-bit data from port 2 and sends it to port 0. At the same time it should read incoming data from serial port at baud rate 9600 and send it to port 1. Assume that crystal frequency - 11.0592 MHz.

Solution :

ORG 0000H

LJMP MAIN ; Avoid using memory space

; allocated to interrupt vector table

ORG 0023H

JNB RI, SKIP ; If RI is low goto skip

MOV A , SBUF ; Otherwise receive serial data

MOV P1, A ; Send it to port 1

CLR RI ; Clear RI

RETI ; Return to main program

SKIP : CLR TI ; Clear TI

RETI ; Return to main program

ORG 100H

MAIN : MOV P2, #0FFH ; Configure P2 as an input port

MOV TMOD, #20H ; Initialize timer 1 in mode 2

MOV TH1, #FDH ; Load count to get 9600 baud rate

MOV SCON, #50H ; Select serial mode with receiver enabled

MOV IE, #10010000B ; Enable serial interrupt

SETB TR1 ; Start timer 1

BACK : MOV A, P2 ; Read data from port 2

MOV P0, A ; Send it to port 0

SJMP BACK ; Repeat

END 

 

Example 16.8.5 Write an 8051 ALP that continuously read 8-bit data from port 2 and sends it to port 0. At the same time it should transmit the same data on serial port. Assume that crystal frequency - 11.0592 MHz.

Solution :

ORG 0000H        

LJMP MAIN ; Avoid using memory space allocated

; to interrupt vector table

ORG 0023H        

JNB TI, SKIP ; If TI is low goto SKIP

MOV SBUF, A ; Transfer data serially

CLRTI ; Clear TI

RETI ; Return to main program

SKIP : CLR RI ; Clear RI

RETI ; Return to main program

ORG 100H

MAIN : MOV P2, 0FFH         ; Configure P2 as an input port

MOV TMOD, #20H ; Initialize timer 1 in mode 2

MOV TH1, #FDH ; Load count to get 9600 baud rate

MOV SCON, #40H ; Select serial mode

MOV IE,#10010000B ; Enable serial interrupt

SETB TRI ; Start timer 1

MOV A, P2          ; Read data from port 2

MOV SBUF, A ; Send the first byte serially

BACK : MOV A, P2 ; Read data from port 2

MOV P0, A          ; Send it to port 0

SJMP BACK ; Repeat

END

Microprocessors and Microcontrollers: Unit III: (c) 8051 I/O Ports, Timer, Serial Port & Interrupts : Tag: : 8051 I/O Ports, Timer, Serial Port & Interrupts - Programming Interrupts