University Questions with Answers (Long Answered Questions)

University Questions with Answers (Long Answered Questions)

(Regulation 2008)

Dec.-09

Q.1 Explain the method of stabilizing the Q point. [Section 2.9]        [16]

 May-10

Q.2 Draw a self (voltage divider) bias and derive all the stability factors S, S' and S" [Section 2.8]   [16]

Q.3 Explain the circuit which uses a diode to compensate for changes in VBE and in Ico. [Section 2.9]         [8]

Q.4 Discuss the operation of thermistor compensation. [Section 2.9] [4]

Dec.-10

Q.5 Draw a block diagram of an unbiased npn transistor. Identify each part of the device depletion and show the regions and barrier voltages. Briefly explain. [Section 2.3] [5]

Q.6 Sketch and explain the input characteristics of transistor in CE mode. [Section 2.4]          [5]

Q.7 With a neat diagram explain output characteristics of npn transistor in CE-configuration. [Section 2.4]         [5]

Q.8 Draw a self (voltage divider) bias and derive all the stability factors S, S' and S" [Section 2.8]   [16]

May-11

Q.9 Sketch and explain the input characteristics of transistor in CE mode. [Section 2.4]          [5]

Q.10 With a neat diagram explain output characteristics of npn transistor in CE-configuration.

[Section 2.4] [5]

Q.11 Derive the expression of stability factor for collector feedback amplifier. [Section 2.8] [8]

May-12

Q.12 What is transistor ? [Section 2.1] [3]

Q.13 Explain the terms emitter, collector and base. [Section 2.2]      [3]

Q.14 Sketch the symbols of transistors. [Section 2.2] [3]

Q.15 Sketch the symbols of transistors and mark the current directions. [Section 2.3]     [4]

Q.16  Explain the operation of NPN  transistor in CE configuration with it’s input and output characteristics. Also define active, saturation        and cut-off regions. [Section 2.4] [16]

Q.17  Compare CB, CE and CC transistor configurations. [Section 2.4]    [8] 

Q.18 Draw a voltage divider bias BJT network. Derive expressions for fCQ and VCEQ and describe the method of drawing the d.c. load line on the output characteristics of transistor. [Section 2.8]         [16]

Q.19 Comment on fixed biasing in BJT. Explain the procedure for locating suitable operating point on the characteristic curves. [Section 2.8]    [10]

Dec.-12

Q.20 Explain the method of stabilizing the Q point. [Section 2.9]      [16]

Q.21 Explain bias compensation. [Section 2.9]    [8]

May-13

Q.22 Sketch and explain the input characteristics of transistor in CE mode. [Section 2.4]        [5]

Q.23 With a neat diagram explain output characteristics of npn transistor in CE-configuration. [Section 2.4] [5]

Q.24  Explain the method of stabilizing the Q point. [Section 2.9]     [16]

Q.25  Explain bias compensation. [Section 2.9][8]

Dec.-13

Q.26  Sketch and explain the input characteristics of transistor in CE mode. [Section 2.4][5]

Q.27  Compare CB, CE and    CC transistor configurations. [Section 2.4] [8]

Q.28 Draw a self (voltage divider) bias and derive all the stability factors S, S' and S" [Section 2.8]   [16]

May-14

Q.29 Sketch and explain the input characteristics of transistor in CB mode. [Section 2.4]

Q.30 With a neat diagram explain the output characteristics of transistor in CB mode. [Section 2.4]   [8]

Q.31 Explain the input I output characteristics of BJT in common base configuration. [Section 2.4]   [11]

Q.32 Compare CE, CB and CC configurations of BJT. [Section 2.4]         [5]

 (Regulation 2013)

Dec.-14

Q.33 Explain the construction and operation of NPN transistor with neat sketch. Also comment on the characteristics of NPN transistor. [Section 2.2]    [16]

Q.34 Explain the construction and operation of NPN transistor with neat sketch. Also comment on the characteristics of NPN transistor. [Section 2.3]    [16]

Dec.-15

Q.35 Explain the selection of Q point for a transistor bias circuit and discuss the limitations on the output voltage swing. [Section 2.5.5]    [8]

Q.36 Discuss the factors involved in the selection of IC,RC ar,d RE f°r a single stage common emitter BJT amplifier circuit, using voltage divider bias [Refer example 2.8.4]      [8]

 Ans. : The value of Rc and hence IC should be such that transistor will operate in active region.

May-17

Q.37 Design a voltage divider bias circuit for transistor to establish the quiescent point at VEE = 12 V, IQ = 1.5 mA, stability factor S ≤ 3, β = 50, VBE = 0.7 V, Vcc = 22.5 V and Rc = 5.6 k Ω.

[Refer example 2.8.11]   [15]

Dec.-17

Q.38 Explain the emitter bias method used in transistor amplifier circuits. [Section 2.8.4]       [5]

Q.39 Compare the characteristics of CB, CE and CC amplifiers. [Section 2.4.4]  [7]