Interfacing 8279 in I/O Mapped I/O

Interfacing 8279 in I/O Mapped I/O

Fig. 12.8.1 shows the interfacing of 8279 with 8085 in I/O mapped I/O technique. Here  signals are activated when  signal is high, indicating I/O bus cycle. Reset out signal from 8085 is connected to the Reset signal of the 8279. CLK input of 8279 is driven from the clock out of 8085. A₀ signal from the 8085 is connected to the A₀ input of 8279. The chip select signal,  is generated using decoding circuit. Interrupt signal from the 8279 is connected to the RST 7.5 input of the 8085. It can also be connected to the RST 5.5, RST 6.5 or Trap input of 8085.

I/O Map :

Review Question

1. Draw and explain the interfacing of 8279 with 8085.