Flip-Flops

UNIT – III

Chapter – 4

(a) Flip-Flops

Syllabus

Sequential logic : SR, JK, D and T flipflops - Level triggering and edge triggering.

Contents

4.1 Introduction to Sequential Logic Circuit …. 4-2 …. May-05, Dec.-14, 15, 17, 18 Marks - 8

4.2 SR Flip-Flop …. 4-5 …. Dec.-03, 05, 14, 15, May-04, 10, 12, Marks 10

4.3 D Flip-Flop …. 4-7 …. Dec.-12, Marks 3

4.4 Clocked JK Flip-Flop        …. 4-9 …. Dec.-03, 08, 11, 12, May-04, 06, 08, Marks 8

4.5 Master-Slave JK Flip-Flop …. 4-13 …. Dec.-05, 08, 10, 17, May-05, 08, 15, 16, 17, Marks 8

4.6 T Flip-Flop …. 4-13 …. May-17, Dec.-17, 18

4.7 Asynchronous or Direct Inputs …. 4-14

4.8 Various Representation of Flip-Flops ….. 4-15 …. Dec.-03, 07, 10, 12, 15, May-05, 06, 07, 10, June-09, Marks 4

4.9 Realization of One Flip-Flop using Other Flip-Flop . … 4-17 …. May-05, 07, 12, 15, Dec.-08, 10, 15, 16, Marks 8

4.10 Two Marks Questions with Answers …. 4-23

4.11 University Questions with Answers

(Long Answered Questions) ….. 4-25